Recently Published Articles
| S.No | Title of the Articles & Authors |
|---|---|
| 1 |
A Three-Operand Binary Adder Using An Advanced VLSI Architecture Fast And Area-Efficient
A three-operand binary adder is used to execute modular arithmetic in a number of cryptography and pseudorandom bit generator (PRBG) methods. Most of the time, the carry save adder (CS3A) is utilised to execute three-operand addition. The ripple-carr ..... Read More |
| 2 |
Method Of Eliminating Harmonics In Cascaded H-Bridge Multilevel Inverters
Because of their straightforward construction and the ease with which they may be used, cascaded structured multilevel inverters are becoming more significant in the field of electrical engineering. For the purpose of this inquiry, the most efficient ..... Read More |
| 3 |
Improvement Of Memory Data Corrections By Using CRC Technique For Fault Torrent Applications
A Bose-Chaudhuri-Hocquenghem (BCH) code decoder that is both highly efficient and consumes very little power when decoding is shown in this paper. DEC-TED is an abbreviation that stands for "double-error-correcting and triple error-detecting.&qu ..... Read More |
| 4 |
SRAM Bit Cell Designed With A Focus On Security In A 7T Configuration
Power analysis (PA) attacks have emerged as a serious threat to security systems since they allow for the extraction of confidential data. These attacks are carried out by analyzing the current that is consumed by the system's power supply. Embed ..... Read More |
| 5 |
Design Of 4:2 Compressor For Parallel Distributed Arithmetic FIR Filter
Distributed arithmetic (DA) calculation is generally utilized for FIR channel execution. In the starting, DA was proposed as successive DA (SDA), and at that point was stretched out to parallel DA (PDA) for higher throughput. This project introduces ..... Read More |
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IJEIAT Statistics
- Papers Received - 165
- Papers Accepted - 31
- Percentage of Acceptance - 18.78%
- Percentage of Rejectance - 81.22%